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14" Dell Latitude E6430 - Performance Upgrades and System Mods


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18 minutes ago, kondilac said:

Thanks for the explanation. 

Making the custom hardware is the smaller problem, port 4 is the big deal. Maybe Dell could enlighten us regarding this part...

 

I don't think that anybody would care. The only way is if we find this out ourselves.

 

I have checked through the schematics  pg. 29 (a few months ago) but haven't found anything that would give an answer, so I gave up.BKSMwVm.png

This is a ss from pg 29 where you can see the JSATA2 connector. As I have commented a while ago, this is a double sided sata odd connector. On one side is a normal sata (inside the red "circle") and the other is a unique pcie connector. The pins that I highlighted are those needed for the PCIe connection (either x2 using EC or x4 using the above mentioned). I you read the thread from the beginning there was a discussion on this matter. @sskillz also detached his JSATA 2 connector but we had no luck enabling these PCIe lanes. The answer is probably inside this P5MKF usb 3.0 bay. But I never got my hands on it. Since this was a computer I bought to use @ work I couldn't justify the extra cost on it.

 

Edited by timohour
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12 minutes ago, timohour said:

 

I don't think that anybody would care. The only way is if we find this out ourselves.

 

I have checked through the schematics  pg. 29 (a few months ago) but haven't found anything that would give an answer, so I gave up.BKSMwVm.png

This is a ss from pg 29 where you can see the JSATA2 connector. As I have commented a while ago, this is a double sided sata odd connector. On one side is a normal sata (inside the red "circle") and the other is a unique pcie connector. The pins that I highlighted are those needed for the PCIe connection (either x2 using EC or x4 using the above mentioned). I you read the thread from the beginning there was a discussion on this matter. @sskillz also detached his JSATA 2 connector but we had no luck enabling these PCIe lanes. The answer is probably inside this P5MKF usb 3.0 bay. But I never got my hands on it. Since this was a computer I bought to use @ work I couldn't justify the extra cost on it.

 

I'm familiar with the experimentations describen in this thread regarding this matter, and those (including Your with the MPCIE card) only used the TX and RX signals, but not the other control signals, that's why i asked  (maybe You haven't seen my edit). So i have one more question regarding this, as You noticed that a MPCIE card fits in this custom sata connector, does the pad-distance of it suit the PCIE-part of it, so i can access all the signals? 

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13 minutes ago, kondilac said:

I'm familiar with the experimentations describen in this thread regarding this matter, and those (including Your with the MPCIE card) only used the TX and RX signals, but not the other control signals, that's why i asked  (maybe You haven't seen my edit). So i have one more question regarding this, as You noticed that a MPCIE card fits in this custom sata connector, does the pad-distance of it suit the PCIE-part of it, so i can access all the signals? 

 

Probably you are going to be able to use some, but definetely not all. AFAIK the pad-disance is the same but you need to modify the mini pcie card in order to fit it in there so you may loose some pins. I can't recall though which pins were accessible and which weren't.

 

Regarding your previous post, I wouldn't agree more but I need to see it in order to believe it. The connections are there for sure, but I can't testify that it is port 4.

 

EDIT: OK found an old photo. you are maybe loosing pins 14 and 25 and maybe 26. Seems like the rest are accessible. Can't say for sure though.

 

But why would you need other signals. They are not needed for x2 or x4.

Edited by timohour
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1 minute ago, kondilac said:

Thanks. Since i know the dimensions and pad distance of the MPCIE i can use them to create a little PCB that i can use to experiment. This is the next thing on my todo list after finishing my docking-pod, which is near :)

 

Ok, keep in mind that I never actually measured it. What I said is supported only by my observations when I tried to enable port 4. It may be slightly different. You can also measure your odd connector in order to find the exact external dimensions. Keep us posted.

 

What's the docking-pod? :)

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I modified a slim PC case, to house a HDD, VGA,and a ATX PSU. Its the same size as the e6430 with the Dell PR03X dock, which sits on the top of it. The PSU powers the lappy through the dock, besides every component inside, and is switched on/off automaticly whenthe machine is docked/undocked. Works flawless with the little script, which disconnects the GPU as a device when i undock :). It's almost ready for the paint job, just missing the cutout for the 92mm fan on the top, which is blowing the air direcly to the intake on the laptops bottom. The interior air-chambers turned out really good, also has a front USB, working power button, and audio in/out. Will post some pics when its finished :)  

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2 hours ago, Khenglish said:

@timohourI think you flipped the rows and columns when looking up the gpu connections. Can you link me the pdf for me to check it the other way?

 

it is in the previous message and in the first post.

 

On 2/2/2016 at 11:55 PM, timohour said:

 

no but I could check through the schematics.

 

 

EDIT: Yep you are right... I **** up...  :beat_brick:

 

EDIT2: Hope I got them right this time.

 

http://imgur.com/a/99I27

Edited by timohour
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Yeah that makes more sense. It's also good news because this means pci-e is undamaged. All that is lost is some display outputs, luckily none of them are lvds.

 

Now to find a GF117 vbios on the interwebs. I've found where the vbios is stored in the system bios. I just need to find a 620m, 625m, 720m, or 820m vbios to replace it with. Anyone know any systems with those cards to check for the vbios?

Edited by Khenglish
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13 hours ago, Khenglish said:

Yeah that makes more sense. It's also good news because this means pci-e is undamaged. All that is lost is some display outputs, luckily none of them are lvds.

 

Now to find a GF117 vbios on the interwebs. I've found where the vbios is stored in the system bios. I just need to find a 620m, 625m, 720m, or 820m vbios to replace it with. Anyone know any systems with those cards to check for the vbios?

LVDS wouldn't be a problem too unless you wanted to disable Optimus.

 

The following laptops run along with an 620m/710m/720m/820m (GF117).

  • Lenovo Ideapad U510 & U410 (625M? or 710M? 2GB)
  • Toshiba Satellite C75-A-13 (710M 1GB DDR3)
  • Aspire E1-571G (620M 1GB DDR3)
  • Lenovo G710 (720M 2GB DDR3)
  • MSI CX61-i572M281BW7 (720M 2GB DDR3)
  • Dell Latitude E5440 (720M 2GB DDR3)
  • Lenovo B5400 (720M 1GB DDR3)
  • Acer Aspire E1-772G (820M 2GB DDR3)
  • HP Compaq 15-a024sg (820M 1GB)
  • Lenovo Ideapad Z40 (820M 2GB)
  • ASUS Transformer TP300L (820M)
  • Dell Inspiron 15 3542-2293 (820M 2GB DDR3)
  • Asus F751LDV-TY178H (820M 2GB DDR3)
  • Asus F555LD-XX243H (820M 2GB)
  • Asus X555LD-XX283H (820M 2GB DDR3)
  • Acer Aspire R14 R3-471TG (820m 2GB DDR3)
  • Acer Aspire V3-571G? (710M 2GB)?

 

Also check this out http://www.dpreview.com/forums/post/54934030

points to this BIOS from dell http://www.dell.com/support/home/ed/en/eddhs1/Drivers/DriversDetails?driverId=907YJ for the GT620M

 

Spoiler

Fixes & Enhancements

Fixes
-Not Applicable

Enhancements
-Update N13M-GS VBIOS to 1301gsp_4g_75.17.65.00.02.rom

Version

Version A10, A10

Category

BIOS

 

And here is a list by ubuntu

 

How can you tell which part of the BIOS region is the vBIOS?

Edited by timohour
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OK so i got a big concern regarding the x4 and even the x2 eGPU thing. Since we can only access the PCIE lanes from the MCH, and that is connected to the CPU via DMI which has exactly the same transfer rate as one PCI lane (5GT/s), i guess there is no real performance benefit from aggregating more lanes from the MCH... Timohour, can you do some benchamrking x1 vs x2 to confirm this?

 

EDIT: I hope i was wrong, and just misinterpreted the info in Intel ARK. If the specified 5GT/s DMI  is per lane, then 4xDMI2 = 20Gt/s, as Timohour stated below.

Edited by kondilac
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11 minutes ago, kondilac said:

OK so i got a big concern regarding the x4 and even the x2 eGPU thing. Since we can only access the PCIE lanes from the MCH, and that is connected to the CPU via DMI which has exactly the same transfer rate as one PCI lane (5GT/s), i guess there is no real performance benefit from aggregating more lanes from the MCH... Timohour, can you do some benchamrking x1 vs x2 to confirm this?

 

I don't have the gear or the laptop to test at the moment. But i don't think this is right. If I am not mistaken the pcie lanes are connected to the PCH which according to our schematics is connected to the CPU with DMI2 x4 (data transfer rate to 2 GB/s with a ×4 link Wiki).  There are also many laptops that feed their thunderbolt port from the PCH ports (AFAIK every non apple laptop do it that way). And they do true x4 (10Gbps or 16Gbps)

Edited by timohour
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13 minutes ago, timohour said:

 

I don't have the gear or the laptop to test at the moment. But i don't think this is right. If I am not mistaken the pcie lanes are connected to the PCH which according to our schematics is connected to the CPU with DMI2 x4 (data transfer rate to 2 GB/s with a ×4 link Wiki).  There are also many laptops that feed their thunderbolt port from the PCH ports (AFAIK every non apple laptop do it that way). And they do true x4 (10Gbps or 16Gbps)

Yes, You are right. But an x4 PCIE connection could still seriously hog the performance of any other components connected through the MCH. Anyway, i had some free time and created the layout for the little test board checking out what's the deal with that PCIE lane @ E-Modular bay, will etch it next week, i will keep this thread posted. 

 

Preparing for the worst case regarding PCIE4, is it possible to set PCIE 1,2,3,5 as x4? How about PCIE3 + any of 1,2,5 as x2?

Edited by kondilac
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1 minute ago, kondilac said:

Yes, You are right. But an x4 PCIE connection could still seriously hog the performance of any other components connected through the MCH. Anyway, i had some free time and created the layout for the little test board checking out what's the deal with that PCIE lane @ E-Modular bay, will etch it next week, i will keep this thread posted. 

 

Preparing for the worst case regardint PCIE4, is it possible to set PCIE 1,2,3,5 as x4? How about PCIE3 + any of 1,2,5 as x2?

No & no.

 

Only 1,2,3,4 or 5,6,7,8 (useless) for x4 and 1,2 or 3,4 or 5,6 or 7,8 for x2. You could also invert the whole array if you set x4 and use 4,3,2,1 but this is also useless unless we find a way to fully utilise port 4.

And pcie 3.0 is available on the PCH only on the newer skylake series 100.

 

It is also interesting that Skylake will run with DMI 3.0 and a total of 3.93GB/s compared to the 2 GB/s DMI 2.0 could do.

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8 minutes ago, timohour said:

No & no.

 

Only 1,2,3,4 or 5,6,7,8 (useless) for x4 and 1,2 or 3,4 or 5,6 or 7,8 for x2. You could also invert the whole array if you set x4 and use 4,3,2,1 but this is also useless unless we find a way to fully utilise port 4.

And pcie 3.0 is available on the PCH only on the newer skylake series 100.

 

It is also interesting that Skylake will run with DMI 3.0 and a total of 3.93GB/s compared to the 2 GB/s DMI 2.0 could do.

Thanks. What is the situation with the clock, and the two control signals when using ports as X2 or x4? Have to use them from the first port in the bundle?

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4 hours ago, kondilac said:

Thanks. What is the situation with the clock, and the two control signals when using ports as X2 or x4? Have to use them from the first port in the bundle?

 

When you set a port to x2 or x4 you have to connect this port like you would do as if you where connecting it @ x1. Then for the remaining ports you just need the RX-TX signals (and offcourse ground).

 

So if you set port 1 @ x2  you have to connect port 1 and then use the TX and RX signals from port 2 (no other signal is needed from port 2)

The same goes for port 3 if you set that @ x2. you just need to use TX RX signals from port 4.

In the following image you can see the pinout used @ x16 cards.

Spoiler

1668D21E4A793AA1229E75

 

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22 hours ago, timohour said:

LVDS wouldn't be a problem too unless you wanted to disable Optimus.

 

The following laptops run along with an 620m/710m/720m/820m (GF117).

 

Also check this out http://www.dpreview.com/forums/post/54934030

points to this BIOS from dell http://www.dell.com/support/home/ed/en/eddhs1/Drivers/DriversDetails?driverId=907YJ for the GT620M

 

And here is a list by ubuntu

 

How can you tell which part of the BIOS region is the vBIOS?

 

 

This is infuriating. All Dell, Lenovo, HP, and Acer systems have the BIOS in an exe, so I can't get the raw bios file. They just exit after seeing that I have the wrong system without giving me any way to reach the file. The MSI actually has a GK208. ASUS doesn't have the vbios included in the system bios. The toshiba very likely has a GF117 vbios AND toshiba always uses raw bios files, BUT BECAUSE THE SATELLITE C75-A-13W WAS NOT RELEASED IN THE US, TOSHIBA'S WEBSITE SAYS IT DOES NOT EXIST. When trying to get the file through the german website with translation on the browser crashes after selecting the laptop.

 

So yeah, if anyone from the Germany area could get me the C75-A-13W bios that'd be great.

 

I have been extracting the bios with phoenixtool.

Edited by Khenglish
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2 hours ago, Khenglish said:

 

 

This is infuriating. All Dell, Lenovo, HP, and Acer systems have the BIOS in an exe, so I can't get the raw bios file. They just exit after seeing that I have the wrong system without giving me any way to reach the file. The MSI actually has a GK208. ASUS doesn't have the vbios included in the system bios. The toshiba very likely has a GF117 vbios AND toshiba always uses raw bios files, BUT BECAUSE THE SATELLITE C75-A-13W WAS NOT RELEASED IN THE US, TOSHIBA'S WEBSITE SAYS IT DOES NOT EXIST. When trying to get the file through the german website with translation on the browser crashes after selecting the laptop.

 

So yeah, if anyone from the Germany area could get me the C75-A-13W bios that'd be great.

 

I have been extracting the bios with phoenixtool.

i could extract the raw bios from the E3520, and I know you can do that from the E5440 too.

 

Check here

 

I will be looking for the C75 too...

 

EDIT: Seems like the Toshiba BIOS is also an exe... added the zip and trying to unpack couldn't find any way to unpack it. uploaded it in case you have another idea.

EDIT2: 3520 seems the easiest way.But the E5440 would have the same format as the E6430. Hope one of the two would work.

Or maybe a user with an E5440 can provide us a dump with fpt...

Edited by timohour
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So I found that the toshiba exe extracts the bios to the windows temp folder.

 

gf117 vbios acquired :)

 

BUT now I find that despite having an unlocked flash descriptor I get error 280 saying write protect is enabled. Not sure how this is the case considering I have modified the ME FW through fpt, and half of the bios is on the same chip as the me fw. Any way around this besides using the programmer?

Edited by Khenglish
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On 7/2/2016 at 5:16 AM, Khenglish said:

So I found that the toshiba exe extracts the bios to the windows temp folder.

 

gf117 vbios acquired :)

 

BUT now I find that despite having an unlocked flash descriptor I get error 280 saying write protect is enabled. Not sure how this is the case considering I have modified the ME FW through fpt, and half of the bios is on the same chip as the me fw. Any way around this besides using the programmer?

 

in order to unlock your BIOS to be flashable you have to enable an UEFI variable. I think it is 0x40 but I am not sure. It's been a while.

 

the other way is using a programmer (which I assume you did)

 

On 7/2/2016 at 8:19 AM, Khenglish said:

So with the gf117 vbios the core still is undetected. It still powers on though.

 

I guess I'll try attaching it again with leaded solder at some point.

 

How did you import the vBIOS into the E6530 BIOS? 

 

Is it possible that an GK107 core would work with the GF108 BIOS?

 

EDIT: It seems that pin combatible are also newer maxwell chips. Especially GM107 (N15P-GX tested side by side with schematics as 860M) and possible the GM108.

If you find a way to insert the vBIOS and make the chip recognisable, I think this would be a great opportunity to upgrade the dGPU. GK107 would still be a real upgrade.

Edited by timohour
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May I ask about calculating correct CPU multiplier value to give in EFI variable guide.

Looking at this quide here:

 

 

It says 

1-Core Ratio Limit 0x25 0x00-0xFF (8-bit value from 0-255) [CPU] Assigned value is CPU Dependent. A good overclock rule is to gauge the stock's max multiplier with Throttlestop then increase that multiplier value by 4-bins.
You can also refer to this post for more information on figuring out the Multiplier limit

 

 

 

 

when doing  setup_var 0x25 0x29

it notified that default offset was 0x00... it made me question... (if right now it is at default, that makes 37 for 1C multiplier)

If I want to raise 1C multiplier then i must add 4 bins to default. Then would it be 0x04?? 

Or I use this calculator here: 
http://www.binaryconvert.com/result_unsigned_char.html?decimal=051055

 

Calculate the decimal value for multiplier (1C - 37multi) , which is 0x25=37 

And add  those 4 bins, so it would be 0x29 (0x25+4) = 41 ?

 

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10 hours ago, Khenglish said:

Default of 0x00 means no change from default. You want to set 0x29 for 41, not 0x04.

 

I tested this with just core1 right now. "setup_var 0x25 0x29" and then  quit the EFI with command "exit".

To see if the 1 core multiplier was changed I run the Cinebench R15 Single CPU bench, still max is 37 , not 41 as expected

 

What am I doing wrong.... do i need to save those changed variables somehow with a command? 

Do I need to change other things before changing the multiplier?

Edited by viilutaja
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